Archive

2026  10

June  4

Digital Circuit Design Series - Signoff

 June 19, 2026 |    ICdesign  |    ICdesign  |    ICdesign
 | 42 words  |  YodaLee

Digital Circuit Design Series - INNOVUS Place and Route

 June 18, 2026 |    ICdesign  |    ICdesign  |    ICdesign
 | 1885 words  |  YodaLee

Digital Circuit Design Series - INNOVUS PowerPlan

 June 17, 2026 |    ICdesign  |    ICdesign  |    ICdesign
 | 1623 words  |  YodaLee

Digital Circuit Design Series - INNOVUS Floorplan

 June 11, 2026 |    ICdesign  |    ICdesign  |    ICdesign
 | 2010 words  |  YodaLee

May  4

Vivado Best Practices in Automation

 May 31, 2026 |     |    Xilinx , Vivado  | 1984 words  |  YodaLee

Using Xilinx Development Board: Connecting Interrupt

 May 15, 2026 |    FPGA  |    Xilinx , Vivado  |    XilinxBoard
 | 523 words  |  YodaLee

Using Xilinx Development Board: Connecting Writing DMA

 May 14, 2026 |    FPGA  |    Xilinx , Vivado  |    XilinxBoard
 | 1003 words  |  YodaLee

Using Xilinx Development Board: Connect and Read DMA

 May 11, 2026 |    FPGA  |    Xilinx , Vivado  |    XilinxBoard
 | 1966 words  |  YodaLee

April  2

Using Xilinx Development Board: Connecting AHB

 April 28, 2026 |    FPGA  |    Xilinx , Vivado  |    XilinxBoard
 | 1413 words  |  Yu-Sheng Lin, Yodalee

Using Xilinx Development Board: Connecting AXI Lite

 April 6, 2026 |    FPGA  |    Xilinx , Vivado  |    XilinxBoard
 | 1604 words  |  YodaLee

2025  9

December  1

Introduction to IEEE1735

 December 4, 2025 |    verilog  |    ICdesign , Xcelium , Cadence , IEEE1735  | 1613 words  |  YodaLee

September  2

RC Extraction Settings

 September 29, 2025 |    ICdesign  |    ICdesign  | 1617 words  |  YodaLee

ECO cell and Spare Cell

 September 10, 2025 |    ICdesign  |    ICdesign  | 991 words  |  YodaLee

August  2

How to layout under 1P3M

 August 25, 2025 |    ICdesign  |    ICdesign  | 2434 words  |  YodaLee

Digital Circuits: Using IP

 August 14, 2025 |    ICdesign  |    ICdesign  | 2445 words  |  YodaLee

June  1

Digital Circuit Design Series - ScanChain and Their Origin

 June 6, 2025 |    ICdesign  |    ICdesign  |    ICdesign
 | 1870 words  |  YodaLee

May  1

Digital Circuit Design Series - APR Preparation

 May 11, 2025 |    ICdesign  |    ICdesign  |    ICdesign
 | 2291 words  |  YodaLee

March  1

Using VCS simulation in digital circuits

 March 29, 2025 |    verilog  |    ICdesign , VCS , Synopsys  | 1297 words  |  YodaLee

January  1

Digital Circuit Design Series - What Does Design Compiler Do

 January 28, 2025 |    ICdesign  |    ICdesign  |    ICdesign
 | 3311 words  |  YodaLee

2024  3

August  1

Digital Circuit Design Series - What is Design Constraint

 August 17, 2024 |    ICdesign  |    ICdesign  |    ICdesign
 | 2592 words  |  YodaLee

June  1

Digital Circuit Design Series - Physical Architecture of Chips

 June 2, 2024 |    ICdesign  |    ICdesign  |    ICdesign
 | 1824 words  |  YodaLee

April  1

Digital Circuit Design Series - Overview of the Tape-out Process

 April 29, 2024 |    ICdesign  |    ICdesign  |    ICdesign
 | 1880 words  |  YodaLee

2023  2

November  1

Digital Circuit Design Series - Introduction

 November 16, 2023 |    ICdesign  |    ICdesign  |    ICdesign
 | 611 words  |  YodaLee

April  1

Installing Open Source FPGA Toolchain on Ubuntu

 April 7, 2023 |    FPGA , hardware , Setup Guide  |    FPGA , ubuntu  | 705 words  |  YodaLee

2021  5

October  1

Open FPGA Series - Nand2Tetris

 October 8, 2021 |    FPGA , verilog  |    icesugar-pro , verilog , Nand2Tetris , CPU  |    FPGA
 | 2975 words  |  YodaLee

September  3

Open FPGA Series - Block RAM

 September 27, 2021 |    FPGA , verilog  |    icesugar-pro , verilog  |    FPGA
 | 1142 words  |  YodaLee

Open FPGA Series - HDMI

 September 13, 2021 |    FPGA , verilog  |    icesugar-pro , verilog , hdmi  |    FPGA
 | 2097 words  |  YodaLee

Open FPGA Series - UART

 September 5, 2021 |    FPGA , verilog  |    icesugar-pro , verilog , uart  |    FPGA
 | 2167 words  |  YodaLee

August  1

Open FPGA Series - Blink LED

 August 23, 2021 |    FPGA , verilog  |    icesugar-pro , verilog  |    FPGA
 | 1062 words  |  YodaLee